The following information is also available:
Here is in index of the event files for each instrument:S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 0 | / S0 AE power status |
S0_AEANL= | 1 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 3 1 2 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 678 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 200 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 0 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 572 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 64514 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 678 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 7935 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 339 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 425 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 65392 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_AEPOW= | 1 | / S0 AE power status |
S0_AEANL= | 0 | / S0 AE analog status |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_LVDU1= | 4095 | / S0 event discrimination upper level for ccd 1 |
S0_ARIO3= | 1 | / S0 area discrimination IN/OUT for ccd 3 |
S0_STAH3= | 316 | / S0 area discrimination H start addr for ccd 3 |
S0_ENDH1= | 2729 | / S0 area discrimination H end addr for ccd 1 |
S0CCDLST= | 0 1 2 3 | / S0 CCD readout order |
S0_STAV0= | 2 | / S0 area discrimination V start addr for ccd 0 |
S0_ENDV0= | 422 | / S0 area discrimination V end addr for ccd 0 |
S0_ENDV1= | 422 | / S0 area discrimination V end addr for ccd 1 |
S0_ENDV3= | 112 | / S0 area discrimination V end addr for ccd 3 |
S0_EVTR1= | 200 | / S0 event threshold for ccd 1 |
S0_EVTR3= | 100 | / S0 event threshold for ccd 3 |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S1BIASHV= | 1 | / S1 Bias selection |
S1BIASHV= | 0 | / S1 Bias selection |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 678 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 678 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 7935 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 338 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 356 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 681 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 200 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 65327 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 80 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 356 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4094 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 65279 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 200 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 303 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 200 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1_LVDU0= | 4095 | / S1 event discrimination upper level for ccd 0 |
S1_LVDU1= | 4095 | / S1 event discrimination upper level for ccd 1 |
S1_LVDU2= | 4095 | / S1 event discrimination upper level for ccd 2 |
S1_ENDH1= | 425 | / S1 area discrimination H end addr for ccd 1 |
S1_ENDV0= | 422 | / S1 area discrimination V end addr for ccd 0 |
S1_ENDV1= | 422 | / S1 area discrimination V end addr for ccd 1 |
S1_ENDV3= | 350 | / S1 area discrimination V end addr for ccd 3 |
S1_EVTR1= | 100 | / S1 event threshold for ccd 1 |
S1_EVTR3= | 100 | / S1 event threshold for ccd 3 |
S1_SPTR0= | 40 | / S1 split threshold for ccd 0 |
S1BIASHV= | 1 | / S1 Bias selection |
S1BIASHV= | 0 | / S1 Bias selection |
S1BIASHV= | 1 | / S1 Bias selection |
S1BIASHV= | 0 | / S1 Bias selection |