The following information is also available:
Here is in index of the event files for each instrument:S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S0_ARENA= | 0 | / S0 Area discrimination enable/disable |
S0_ARENA= | 1 | / S0 Area discrimination enable/disable |
S1_LVDL0= | 152 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 146 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 136 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 148 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 348 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 334 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 311 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 340 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 348 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 334 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 311 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 340 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 152 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 146 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 136 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 148 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 152 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 146 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 136 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 148 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 348 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 334 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 311 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 340 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 348 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 334 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 311 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 340 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 152 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 146 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 136 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 148 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 152 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 146 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 136 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 148 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 348 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 334 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 311 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 340 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 348 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 334 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 311 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 340 | / S1 event discrimination lower level for ccd 3 |
S1_LVDL0= | 152 | / S1 event discrimination lower level for ccd 0 |
S1_LVDL1= | 146 | / S1 event discrimination lower level for ccd 1 |
S1_LVDL2= | 136 | / S1 event discrimination lower level for ccd 2 |
S1_LVDL3= | 148 | / S1 event discrimination lower level for ccd 3 |
CPU2= | RUN | / CPU2 run/stop |
CPU3= | RUN | / CPU3 run/stop |
CPU2= | STOP | / CPU2 run/stop |
CPU3= | STOP | / CPU3 run/stop |
CPU2= | RUN | / CPU2 run/stop |
CPU3= | RUN | / CPU3 run/stop |
CPU2= | STOP | / CPU2 run/stop |
CPU3= | STOP | / CPU3 run/stop |